This invention relates generally to mobile computing systems, and more specifically to a method for quickly detecting the removal of alternating current and transitioning system processor to a low performance level in response.
Today mobile computing systems (MCSs) can be made to operate at frequencies close to those of a desktop computer. For example, MCSs can operate at 850 MHz while a typical desktop operates at 1 GHz. To take advantage of system performance, a MCS will typically have an alternating current (AC) mode for use when an AC line voltage source is available. The AC mode allows for maximized operating frequency at the expense of power consumption. MCSs also have the ability to recognize when AC power is available and automatically switch to a higher frequency (e.g., 850 MHz). When the AC source is removed (i.e., when the AC adapter is removed), and power is supplied by a limited direct current (DC) source (e.g., a battery), the MCS is transitioned to a lower performance level (i.e., the CPU is transitioned to a lower frequency (e.g., 500 MHz) and thus a lower voltage). The lower operating frequency provides extended battery life. The transition to a lower performance level involves circuitry to detect AC power removal and software to effect CPU transition to a lower frequency.
Detection of the removal of AC power is typically accomplished by including AC detection circuitry within a system""s input power control circuitry as shown in FIG. 1. FIG. 1 depicts a typical system input power control block diagram for a MCS according to the prior art. The AC adapter voltage 101 is typically 15 -18V. This voltage is filtered by a common-mode choke 102 to filter out unwanted input noise. The adapter voltage sources current to power the MCS and recharges the battery 106 through a diode, DAdapter, 103. The Battery Charger 104 charges the battery 106 through a charging path controlled by a P-Channel mosfet, QCHRG, 105. A typical battery voltage ranges from 7.5V to 12.6V. When the AC adapter is not plugged into the system, the battery provides current to power the system through a discharging path controlled by QDISCHRG, 107. The node 108 at which the cathode of the DADAPTER diode 103 and the source of QDISCHRG 107 meet is typically where the AC detection circuitry 109 is located. The capacitors between the AC adapter voltage 101 and the AC detection circuitry 109 continue to hold up the voltage level for some time after the AC adapter voltage 101 is removed. It can, therefore, take several milliseconds (ms) to detect the removal of the AC adapter voltage 101.
This time is dwarfed by the approximately 2 seconds that the typical power management software (PMS) takes to transition the CPU after AC power removal has been detected. The typical (PMS) includes a driver that periodically polls the system to determine if AC power is available. If AC power is not available, the PMS transitions the CPU to a lower performance level. The polling interval could be set to as low as 50 ms, but this would require CPU time and therefore, adversely affect system performance.
During the time it takes for the MCS to realize that the AC power has been removed and transition the CPU to a lower frequency, the MCS is typically operating at its highest performance level and therefore still using power at a maximum rate. This situation presents difficulties especially for the smaller, lighter weight, mobile systems. Smaller, lighter weight, MCSs, typically have only three cells serially connected, having a resultant impedance of 300 ohms. This impedance can rise significantly (e.g., 50%) for batteries that are nearly discharged. The high impedance associated with this situation causes the power drain on the battery to attain and exceed maximum levels, typically 30 watts. When the MCS operates at a high frequency the processor draws more power that in-turn causes other components to draw more power. This power consumption adds up to exceed the maximum battery output. The battery pack has a protection circuit that monitors the power that the battery is supplying. When the maximum is exceeded the battery will not supply power and the MCS will be shut down or reset. This causes a loss of current data; work in-progress will be lost. Also, resuming from a powered-off state uses some of the limited battery power. To avoid this unwanted system shutdown, the MCS must be able to detect AC power removal and transition the CPU to a lower performance level within roughly 2 ms. This grace period is due to the fact that the capacitance of a typical system input power control circuit provides residual power for approximately 2 ms as discussed above.